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If V_A and V_B are the input voltages (either 5 V or 0 V) and V₀ is the output voltage then the two gates represented in the following circuits (A) and (B) are [Figure: (A) inputs V_A and V_B connect through diodes D₁, D₂ (anodes on the inputs) to a common output V₀, which is joined to ground through R=1 kΩ. (B) input V_B drives the base of an npn transistor (β=150) through R_B=100 kΩ; the collector goes to V=5 V through R_C=1 kΩ and is the output V₀; the emitter is grounded.]
Asked in JEE Main 31st Aug 2nd Shift 2021 · Waveforms, switches and diode gates
- (1) OR and NOT gate
- (2) AND and NOT gate
- (3) AND and OR gate
- (4) NAND and NOR gate
Answer: (1) OR and NOT gate
Step-by-step solution
(A): if either input is at 5 V its diode conducts and V₀ is high: OR.
(B): a high input saturates the transistor and pulls V₀ low; a low input cuts it off and V₀=5 V: NOT.
Why the other options are wrong
- (2) Diodes with anodes on the inputs and a pull-down resistor make OR, not AND.
- (3) The transistor stage inverts; it is not an OR gate.
- (4) Neither circuit combines inversion with a two-input function.
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