Practice portal › Semiconductor Electronics › Digital Electronics and Logic Gates
Identify the logic operation carried out. [Figure: A and B each go into a NAND gate with tied inputs; the outputs feed a NOR gate giving Y.]
Asked in JEE Main 25th July 1st Shift 2021 · Gate combinations and truth tables
- (1) AND
- (2) NAND
- (3) NOR
- (4) OR
Answer: (1) AND
Step-by-step solution
Tied NANDs give A,B.
Y=A+B=AB: AND.
Why the other options are wrong
- (2) Missing one inversion.
- (3) Ignores the input inverters.
- (4) Would need plain A and B into an OR gate, with no inverters and no bubble.
Reading this solution needs no sign-in. You only sign in to practise against the clock and keep your progress.
Practise this with a timer