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The output of a NAND gate is divided into two in parallel and fed to another NAND gate. The resulting gate is a

Asked in NEET Karnataka 2013 · Gate combinations and truth tables

• (1) AND gate
• (2) NOR gate
• (3) OR gate
• (4) NOT gate

Step-by-step solution

Why the other options are wrong

• (2) NOR would be low whenever either input is high; this combination is high whenever both inputs are high.
• (3) OR would be high when either input is high, but with A=1,B=0 the first NAND gives 1 and the second inverts it to 0.
• (4) NOT takes a single input; this arrangement still has the two inputs A and B feeding the first gate.

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